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Memorias de investigación
Communications at congresses:
Interdependency of Fixed-Point Optimization and Architectural Synthesis for Reconfigurable Devices
Year:2011
Research Areas
  • Microelectronics
Information
Abstract
In this paper, the interdependency of the design tasks of fixed-point optimization and architectural synthesis is analyzed, aiming at FPGA implementations. Fixed-point arithmetic is widely adopted for low-cost FPGA implementations of DSP algorithm. Despite his success, there are still many open issues regarding the automatic synthesis of fixed-point circuits. Normally, fixed-point optimization is performed without considering any architectural issues or assuming a fully parallel implementation. Thus, any architectural optimization made after may produce non-optimal results. The effect of using different fixed-point optimization methods on the final architecture is studied. Several methods to perform fixed-point optimization, architectural synthesis, and the combination of both, are presented. The analysis considers both LUT-based resources and DSP blocks. The results yield that when the architectural model used during the two design tasks, does not match, then, it is not necessary to perform a thorough -- and time-consuming -- fixed-point optimization (i.e. simulated annealing). Also, the combined synthesis techniques produces area reductions up to 20\%.
International
No
Congress
XI Jornadas de Computación Reconfigurable y Aplicaciones, JCRA'11
960
Place
Tenerife (España=
Reviewers
Si
ISBN/ISSN
978-84-614881-4-8
Start Date
07/09/2011
End Date
09/09/2011
From page
269
To page
278
Actas de las XI Jornadas de Computación Reconfigurable y Aplicaciones
Participants
  • Autor: Gabriel Caffarena Fernández (Universidad CEU San Pablo de Madrid)
  • Autor: Carlos Carreras Vaquer (UPM)
  • Autor: Juan Antonio Lopez Martin (UPM)
Research Group, Departaments and Institutes related
  • Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
  • Departamento: Ingeniería Electrónica
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