Abstract
|
|
---|---|
Side-channel attacks (SCA) exploit leakages that are dependant on critical data. Embedded system designers have detected hardware sources of information leakage and they are proposing hardware countermeasures to avoid them. From the software point of view, designers usually inhibit compiler optimizations to reduce asymmetries, although an analysis of their effects has not been done yet. In this paper we evaluate the effect of compiler optimizations on the SCA resistance of the implementation of an encryption algorithm. We perform the evaluation on a LLVM bitcode implementation of the AES algorithm, detecting that some optimization sequences even improve resistance against SCA by 30\% | |
International
|
Si |
Congress
|
DCIS 2011 |
|
960 |
Place
|
Albufeira, Portugal |
Reviewers
|
Si |
ISBN/ISSN
|
978-84690-8629-2 |
|
|
Start Date
|
16/11/2011 |
End Date
|
19/11/2011 |
From page
|
1 |
To page
|
6 |
|
Proccedings 26th Conference on Design of Circuits and Integrated Systems |