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Memorias de investigación
Communications at congresses:
Self-reference Scrubber for TMR Systems Based on Xilinx Virtex FPGAs
Year:2011
Research Areas
  • Microelectronics
Information
Abstract
SRAM-based FPGAs are sensitive to radiation effects. Soft errors can appear and accumulate, potentially defeating mitigation strategies deployed at the Application Layer. Therefore, Configuration Memory scrubbing is required to improve radiation tolerance of such FP- GAs in space applications. Virtex FPGAs allow runtime scrubbing by means of dynamic partial reconfiguration. Even with scrubbing, intra- FPGA TMR systems are subjected to common-mode errors affecting more than one design domain. This is solved in inter-FPGA TMR sys- tems at the expense of a higher cost, power and mass. In this context, a self-reference scrubber for device-level TMR system based on Xilinx Virtex FPGAs is presented. This scrubber allows for a fast SEU/MBU detection and correction by peer frame comparison without needing to access a golden configuration memory.
International
Si
Congress
INTEGRATED CIRCUIT AND SYSTEM DESIGN. POWER AND TIMING MODELING, OPTIMIZATION, AND SIMULATION (PATMOS 2012)
960
Place
Madrid, España
Reviewers
Si
ISBN/ISSN
978-3-642-24153-6
Start Date
26/09/2011
End Date
29/09/2011
From page
133
To page
142
Lecture Notes in Computer Science, 2011, Volume 6951/2011
Participants
  • Autor: M. Luisa Lopez Vallejo (UPM)
Research Group, Departaments and Institutes related
  • Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
  • Departamento: Ingeniería Electrónica
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