Observatorio de I+D+i UPM

Memorias de investigación
Book chapters:
Suitability of Artificial Neural Networks for Designing LoC Circuits
Year:2011
Research Areas
  • Information technology and adata processing
Information
Abstract
The simulation of complex LoC (Lab-on-a-Chip) devices is a process that requires solving computationally expensive partial differential equations. An interesting alternative uses artificial neural networks for creating computationally feasible models based on MOR techniques. This paper proposes an approach that uses artificial neural networks for designing LoC components considering the artificial neural network topology as an isomorphism of the LoC device topology. The parameters of the trained neural networks are based on equations for modeling microfluidic circuits, analogous to electronic circuits. The neural networks have been trained to behave like AND, OR, Inverter gates. The parameters of the trained neural networks represent the features of LoC devices that behave as the aforementioned gates. This would mean that LoC devices universally compute.
International
Si
10.1007/978-3-642-21501-8_38
Book Edition
Book Publishing
Springer Berlin Heidelberg
ISBN
978-3-642-21500-1
Series
Book title
Advances in Computational Intelligence
From page
307
To page
314
Participants
  • Autor: Sandra Maria Gomez Canaval (UPM)
  • Autor: Juan Bautista Castellanos Peñuela (UPM)
Research Group, Departaments and Institutes related
  • Creador: Departamento: Inteligencia Artificial
  • Departamento: Lenguajes, Proyectos y Sistemas Informáticos
  • Grupo de Investigación: Grupo de Computación Natural
S2i 2019 Observatorio de investigación @ UPM con la colaboración del Consejo Social UPM
Cofinanciación del MINECO en el marco del Programa INNCIDE 2011 (OTR-2011-0236)
Cofinanciación del MINECO en el marco del Programa INNPACTO (IPT-020000-2010-22)