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Memorias de investigación
Communications at congresses:
Multi-DSP Implementation of a H.264/SVC Decoder
Year:2013
Research Areas
  • Electronic technology and of the communications
Information
Abstract
In this paper, the implementation of a Multi-DSP based video decoder compliant with the H.264/SVC standard (14496-10 Annex G) is presented. An optimized single DSP-based decoder implementation has been splitted in two processes: the frame decoding (entropy decoding and motion compensation) and the deblocking filter. A multi-DSP device has been used to parallelize the execution of the processes. The performance has been measured using H.264/SVC sequences with different configurations.
International
Si
Congress
Consumer Electronics (ISCE), 2013 IEEE 17th International Symposium on
960
Place
Hsinchu
Reviewers
Si
ISBN/ISSN
0747-668X
10.1109/ISCE.2013.6570153
Start Date
03/06/2013
End Date
06/06/2013
From page
145
To page
146
Proceedongs of the 2013 IEEE 17th International Symposium on Consumer Electronics (ISCE),
Participants
  • Autor: Fernando Pescador Del Oso (UPM)
  • Autor: Eduardo Juarez Martinez (UPM)
  • Autor: Matias Javier Garrido Gonzalez (UPM)
Research Group, Departaments and Institutes related
  • Creador: Grupo de Investigación: Grupo de Diseño Electrónico y Microelectrónico
  • Centro o Instituto I+D+i: Tecnologías del Software y Sistemas Multimedia para la Sostenibilidad (CITSEM)
  • Departamento: Sistemas Electrónicos y de Control
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