Observatorio de I+D+i UPM

Memorias de investigación
Communications at congresses:
Impact of the control on the size of the output capacitor in the integration of Buck converters
Year:2014
Research Areas
  • Electric engineers, electronic and automatic (eil)
Information
Abstract
One of the main challenges in PowerSoC converters is the integration of the output capacitor. In some applications, the minimum value of the capacitance is constrained not by the maximum allowed voltage ripple but by dynamic requirements. This paper investigates for a 10 MHz Buck converter if the design of very fast controls can reduce the required output capacitor and which controls are more suitable. It is also analyzed the effect that the moment in which the load transient can occur has on the reduction of the size of the output capacitor.
International
Si
Congress
Integrated Power Systems (CIPS), 2014 8th International Conference on
960
Place
Reviewers
Si
ISBN/ISSN
978-3-8007-3578-5
Start Date
25/02/2014
End Date
27/02/2014
From page
1
To page
6
Impact of the control on the size of the output capacitor in the integration of Buck converters
Participants
  • Autor: Jorge Cortés González (UPM)
  • Autor: Vladimir Svikovic . (UPM)
  • Autor: Pedro Alou Cervera (UPM)
  • Autor: Jesus Angel Oliver Ramirez (UPM)
  • Autor: Jose Antonio Cobos Marquez (UPM)
Research Group, Departaments and Institutes related
  • Creador: Grupo de Investigación: Electrónica Industrial
  • Centro o Instituto I+D+i: Centro de Electrónica Industrial. CEI
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