Observatorio de I+D+i UPM

Memorias de investigación
Communications at congresses:
High-Level Design using Intel FPGA OpenCL: a Hyperspectral Imaging Spatial-Spectral Classifier
Year:2017
Research Areas
  • Electronic technology and of the communications
Information
Abstract
Current computational demands require increasing designer's efficiency and system performance per watt. A broadly accepted solution for efficient accelerators implementation is reconfigurable computing. However, typical HDL methodologies require very specific skills and a considerable amount of designer's time. Despite the new approaches to high-level synthesis like OpenCL, given the large heterogeneity in today's devices (manycore, CPUs, GPUs, FPGAs), there is no one-fits-all solution, so to maximize performance, platform-driven optimization is needed. This paper reviews some latest works using Intel FPGA SDK for OpenCL and the strategies for optimization, evaluating the framework for the design of a hyperspectral image spatial-spectral classifier accelerator. Results are reported for a Cyclone V SoC using Intel FPGA OpenCL Offline Compiler 16.0 out-of-the-box. From a common baseline C implementation running on the embedded ARM® Cortex®-A9, OpenCL-based synthesis is evaluated applying different generic and vendor specific optimizations. Results show how reasonable speedups are obtained in a device with scarce computing and embedded memory resources. It seems a great step has been given to effectively raise the abstraction level, but still, a considerable amount of HW design skills is needed.
International
Si
Congress
Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2017 12th International Symposium on
960
Place
Madrid
Reviewers
Si
ISBN/ISSN
978-1-5386-3344-1
10.1109/ReCoSoC.2017.8016152
Start Date
12/07/2017
End Date
14/07/2017
From page
1
To page
8
Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2017 12th International Symposium on
Participants
  • Autor: R. Domingo (CITSEM-UPM)
  • Autor: Ruben Salvador Perea (UPM)
  • Autor: Himar Fabelo (ULPGC)
  • Autor: Daniel Madroñal Quintin (UPM)
  • Autor: Samuel Ortega (ULPGC)
  • Autor: Raquel Lazcano Lopez (UPM)
  • Autor: Eduardo Juarez Martinez (UPM)
  • Autor: Gustavo Marrero (ULPGC)
  • Autor: Cesar Sanz Alvaro (UPM)
Research Group, Departaments and Institutes related
  • Creador: Grupo de Investigación: Grupo de Diseño Electrónico y Microelectrónico
  • Centro o Instituto I+D+i: Centro de Investigación en Tecnologías del Software y Sistemas Multimedia para la Sostenibilidad (CITSEM)
  • Departamento: Ingeniería Telemática y Electrónica
S2i 2020 Observatorio de investigación @ UPM con la colaboración del Consejo Social UPM
Cofinanciación del MINECO en el marco del Programa INNCIDE 2011 (OTR-2011-0236)
Cofinanciación del MINECO en el marco del Programa INNPACTO (IPT-020000-2010-22)