Memorias de investigación
Ponencias en congresos:
An FPGA Implementation of the Powering Function with Single Precision Floating-Point Arithm
Año:2008
Áreas de investigación
  • Industria electrónica
Datos
Descripción
In this work we present an FPGA implementation of a single-precision °oating-point arith- metic powering unit. Our powering unit is based on an indirect method that transforms xy into a chain of operations involving a logarithm, a multiplication, an exponential function and dedicated logic for the case of a negative base. This approach allows to use the full input range for the base and exponent without limiting the range of the exponent as in direct methods. A tailored hardware implementation is exploited to increase the accuracy of the unit reducing the relative errors of the operations while high performance is obtained taking advantage of the FPGA capabilities for parallel architectures. A careful design of the pipeline stages of the involved operators allows a clock cycle of 201.3 MHz on a Xilinx Virtex-4 FPGA.
Internacional
Si
Nombre congreso
8th Conference on Real Numbers and Computers
Tipo de participación
960
Lugar del congreso
Santiago de Compostela (Spain)
Revisores
Si
ISBN o ISSN
978-84-691-4381-0
DOI
Fecha inicio congreso
07/07/2008
Fecha fin congreso
09/07/2008
Desde la página
68
Hasta la página
77
Título de las actas
Proceedings 8th Conference on Real Numbers and Computers (RNC8)
Esta actividad pertenece a memorias de investigación
Participantes
Grupos de investigación, Departamentos, Centros e Institutos de I+D+i relacionados
  • Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
  • Departamento: Ingeniería Electrónica