Observatorio de I+D+i UPM

Memorias de investigación
Book chapters:
A Systematic Process for Implementing Gateways for Test Tools
Year:2009
Research Areas
  • Programming language
Information
Abstract
Test automation is facing a new challenge because tools, as well as having to provide conventional test functionalities, must be capable to interact with ever more heterogeneous complex systems under test (SUT). The number of existing software interfaces to access these systems is also a growing number. The problem cannot be analyzed only from a technical or engineering perspective; the economic perspective is as important. This paper presents a process to systematically implement gateways which support the communication between test tools and SUTs with a reduced cost. The proposed solution does not preclude any interface protocol at the SUT side. This process is supported using a generic architecture of a gateway defined on top of OSGi. Any test tool can communicate with the gateway through a unique defined interface. To communicate the gateway and the SUT, basically, the driver corresponding to the SUT software interface has to be loaded.
International
Si
10.1109/ECBS.2009.40
Book Edition
0
Book Publishing
IEEE
ISBN
978-0-7695-3602-6
Series
Book title
16th Annual IEEE International Conference and Workshop on the Engineering of Computer Based Systems
From page
58
To page
66
Participants
  • Autor: Jessica Diaz Fernandez (UPM)
  • Autor: Juan Garbajosa Sopeña (UPM)
  • Autor: Agustin Yague Panadero (UPM)
Research Group, Departaments and Institutes related
  • Creador: Grupo de Investigación: Grupo de tecnología de software y sistemas
  • Departamento: Organización y Estructura de la Información
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