Observatorio de I+D+i UPM

Memorias de investigación
Communications at congresses:
Development of efficient FPGA-based phase meters for IR-interferometers. optimizations for multi-channel interferometers
Year:2010
Research Areas
  • Circuits for signal treatment and instrumentation
Information
Abstract
Infrared (IR) interferometry is a method for measuring integrated electronic density in fusion plasmas. The great performance achieved by FPGAs in resolving digital signal processing tasks has suggested to use this type of technology in the two-color IR interferometers of the modern stellarators, such as TJ-II and the future interferometer of W7-X. TJ-II is a medium scale stellarator that employs a two-color heterodyne IR interferometer (CO2, ¿1 = 10.591 ¿m and NdYAG, ¿2 = 1.064 ¿m) for measuring line average electronic density. W7-X is a stellarator in which, due to technical restrictions, an IR interferometer of (CO2, ¿1 = 10.591 ¿m and CO, ¿2 = 5.295 ¿m) needs to be developed. The electronic density computation in this type of diagnostics basically involves three steps: (i) detection of the interference measuring signals, (ii) computation of the phase differences between the measuring and reference signals, and (iii) calculation of the line-integrated electronic density from the optical path-length differences. The possibility of using the measurements of these diagnostics as real-time feedback signals for control purposes is opened. Current phase-meters based on general purpose processors do not permit real-time calculus directly over the signals in these type of interferometers. In this contribution a solution to this problem based on a specific processor implemented in an FPGA is addressed. Several signal processing techniques as well as a phase measuring algorithm have been defined and finally the specific processor has been implemented in an FPGA. This FPGA is integrated in a system that includes high speed analog-to-digital converters and a computer that controls the FPGA. The implementation of this processor in the FPGA with several optimizations for multi-channel systems is detailed. Finally results from TJ-II and from W7-X pro totype are presented.
International
Si
Congress
Real Time Conference (RT), 2010 17th IEEE-NPSS
960
Place
Lisboa, Portugal
Reviewers
Si
ISBN/ISSN
978-1-4244-7108-9
10.1109/RTC.2010.5750375
Start Date
24/05/2010
End Date
28/05/2010
From page
1
To page
7
Real Time Conference (RT), 2010 17th IEEE-NPSS
Participants
  • Autor: Luis Esteban Hernández (UPM)
  • Autor: Pablo Pedreira Conchado (Universidad Carlos III de Madrid)
  • Autor: Juan Antonio Lopez Martin (UPM)
  • Autor: Pablo Acedo Gallardo (Universidad Carlos III de Madrid)
  • Autor: Octavio Nieto-Taladriz Garcia (UPM)
  • Autor: Miguel Sánchez Gómez (CIEMAt)
Research Group, Departaments and Institutes related
  • Creador: Departamento: Ingeniería Electrónica
S2i 2020 Observatorio de investigación @ UPM con la colaboración del Consejo Social UPM
Cofinanciación del MINECO en el marco del Programa INNCIDE 2011 (OTR-2011-0236)
Cofinanciación del MINECO en el marco del Programa INNPACTO (IPT-020000-2010-22)