Observatorio de I+D+i UPM

Descripción
This work proposes an encapsulation scheme aimed at simplifying the reuse process of hardware cores. This hardware encapsulation approach has been conceived with a twofold objective. First, we look for the improvement of the reuse interface associated with the hardware core description. This is carried out in a first encapsulation level by improving the limited types and configuration options available in the conventional HDLs interface, and also providing information related to the implementation itself. Second, we have devised a more generic interface focused on describing the function avoiding details from a particular implementation, what corresponds to a second encapsulation level. This encapsulation allows the designer to define how to configure and use the design to implement a given functionality. The proposed encapsulation schemes help improving the amount of information that can be supplied with the design, and also allow to automate the process of searching, configuring and implementing diverse alternatives.
Internacional	Si
Nombre congreso	17th International Conference on Engineering of Complex Computer Systems (ICECCS), 2012
Tipo de participación	960
Lugar del congreso
Revisores	Si
ISBN o ISSN	978-1-4673-2156-3
DOI	10.1109/ICECCS.2012.21
Fecha inicio congreso	18/07/2012
Fecha fin congreso	20/07/2012
Desde la página	49
Hasta la página	56
Título de las actas	Proceedings 17th International Conference on Engineering of Complex Computer Systems (ICECCS), 2012

Esta actividad pertenece a memorias de investigación

• Autor: Carlos Angel Iglesias Fernandez (UPM)

• Creador: Grupo de Investigación: Grupo de Sistemas Inteligentes
• Departamento: Ingeniería de Sistemas Telemáticos