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Descripción
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| Synchronization of the carrier frequency o®set (CFO) is a critical task in orthogonal frequency division multiplexing systems. Imperfect estimation of the CFO causes inter-carrier interference (ICI) that severely degrades the performance of the communications system. Although this is a well studied subject at the algorithmic level, more research is needed when considering implementations in real hardware. Translation of an algorithmic speci¯cation to a hardware language is a time consuming task for the designer. This task is more di±cult when the target technology o®ers limited resources, as in the case of ¯eld programmable gate arrays (FPGAs). Some rapid prototyping tools, as System Generator from Xilinx or Synplify DSP from Synopsys Synplicity, are available for the designer to facilitate this task. However, their performance has not been evaluated in the literature. Therefore, the goal of this paper is to present an illustrating example of an implementation methodology using these tools and to evaluate their performance when considering a real design. In particular, several FPGA implementations of a frequency synchronization scheme for the 802.16d (¯xed WiMAX) standard using these rapid prototyping tools are studied and evaluated. The results from the di®erent solutions are analyzed and compared to draw conclusions about their advantages and drawbacks. | |
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Internacional
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Si |
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JCR del ISI
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Si |
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Título de la revista
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Journal of Circuits, Systems and Computers |
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ISSN
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0218-1266 |
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Factor de impacto JCR
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0,264 |
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Información de impacto
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Volumen
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21 |
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DOI
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Número de revista
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7 |
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16 |
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