Communications at congresses:
Multi-DSP Implementation of a H.264/SVC Decoder
Multi-DSP Implementation of a H.264/SVC Decoder
Year:2013
Research Areas
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Electronic technology and of the communications
Information
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Abstract
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| In this paper, the implementation of a Multi-DSP based video decoder compliant with the H.264/SVC standard (14496-10 Annex G) is presented. An optimized single DSP-based decoder implementation has been splitted in two processes: the frame decoding (entropy decoding and motion compensation) and the deblocking filter. A multi-DSP device has been used to parallelize the execution of the processes. The performance has been measured using H.264/SVC sequences with different configurations. | |
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International
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Si |
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Congress
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Consumer Electronics (ISCE), 2013 IEEE 17th International Symposium on |
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960 |
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Place
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Hsinchu |
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Reviewers
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Si |
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ISBN/ISSN
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0747-668X |
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10.1109/ISCE.2013.6570153 |
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Start Date
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03/06/2013 |
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End Date
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06/06/2013 |
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From page
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145 |
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To page
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146 |
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Proceedongs of the 2013 IEEE 17th International Symposium on Consumer Electronics (ISCE), |
Participants
- Autor: Fernando Pescador Del Oso (UPM)
- Autor: Eduardo Juarez Martinez (UPM)
- Autor: Matias Javier Garrido Gonzalez (UPM)
Research Group, Departaments and Institutes related
- Creador: Grupo de Investigación: Grupo de Diseño Electrónico y Microelectrónico
- Centro o Instituto I+D+i: Tecnologías del Software y Sistemas Multimedia para la Sostenibilidad (CITSEM)
- Departamento: Sistemas Electrónicos y de Control
S2i 2021 Observatorio de investigación @ UPM con la colaboración del Consejo Social UPM
Cofinanciación del MINECO en el marco del Programa INNPACTO (IPT-020000-2010-22)