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Descripción
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| Integrating multiple power converters on-chip improves energy efficiency of manycore architectures. Switchedcapacitor (SC) dc?dc converters are compatible with conventional CMOS processes, but traditional implementations suffer from limited conversion efficiency. We propose a dynamic voltage and frequency scaling scheme with SC converters that achieves high converter efficiency by allowing the output voltage to ripple and having the processor core frequency track the ripple. Minimum core energy is achieved by hopping between different converter modes and tuning body-bias voltages. A multicore processor model based on a 28-nm technology shows conversion efficiencies of 90% along with over 25% improvement in the overall chip energy efficiency. | |
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Internacional
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Si |
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JCR del ISI
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Si |
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Título de la revista
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
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ISSN
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1063-8210 |
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Factor de impacto JCR
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1,219 |
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Información de impacto
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Datos JCR del año 2011 |
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Volumen
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23 |
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DOI
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10.1109/TVLSI.2014.2316919 |
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Número de revista
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4 |
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Desde la página
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723 |
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Hasta la página
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730 |
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Mes
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ABRIL |
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Ranking
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