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Memorias de investigación
Ponencias en congresos:
Implementation tradeoffs of triangle traversal algorithms for graphics processing
Año:2014
Áreas de investigación
  • Diseño de circuitos integrados digitales
Datos
Descripción
Current CPU architectures provide high processing rates in graphical applications because of their specialized graphics pipeline. So far, little attention has been paid in the scientific literature to the analysis and study of different hardware structures that implement specific pipeline stages. In this work we have identified one of the key stages in the graphics pipeline, the triangle traversal procedure, and we have implemented it in a 90 nm standard cell technology, comparing three different algorithms: Bounding-box, Zig-zag and Hilbert curve-based. The experimental results show that important area-latency-frequency-throughput tradeoffs must be taken into account for the implementation of the triangle traversal stages. Furthermore, since power is a main concern in CPUs, we have studied how some triangle characteristics such as the shape, size, position and depth affect the power consumption.
Internacional
Si
Nombre congreso
Design of Circuits and Integrated Circuits (DCIS), 2014 Conference on,
Tipo de participación
960
Lugar del congreso
Revisores
Si
ISBN o ISSN
978-1-4799-5743-9
DOI
10.1109/DCIS.2014.7035578
Fecha inicio congreso
26/11/2014
Fecha fin congreso
28/11/2014
Desde la página
1
Hasta la página
6
Título de las actas
Design of Circuits and Integrated Circuits (DCIS), 2014 Conference on,
Esta actividad pertenece a memorias de investigación
Participantes
  • Autor: Pablo Royer Del Barrio (UPM)
  • Autor: Pablo Ituero Herrero (UPM)
  • Autor: M. Luisa Lopez Vallejo (UPM)
  • Autor: Carlos Alberto Lopez Barrio (UPM)
Grupos de investigación, Departamentos, Centros e Institutos de I+D+i relacionados
  • Creador: Departamento: Ingeniería Electrónica
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