Abstract
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A downsized implementation of a cognitive architecture in an FPGA. Red neuronal integrda en FPGA para el procesado de imágenes | |
International
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Si |
Congress
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SPIE Europe Microtechnologies for the New Millennium |
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960 |
Place
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Gran Hotel Costa Meloneras; Maspalomas; Gran Canaria; Spain |
Reviewers
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Si |
ISBN/ISSN
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9-7808194672188 |
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Start Date
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02/05/2007 |
End Date
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From page
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