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Ponencias en congresos:
Modeling side-channel cache attacks on AES
Áreas de investigación
  • Tecnología electrónica y de las comunicaciones,
  • Ciencias de la computación y tecnología informática
In recent years, side-channel attacks have gained increasing attention, mainly due to their ability to extract sensitive infor- mation from their victims in an effortless way. Also, with the development and spread of cloud computing, where victims and potential attackers share physical infrastructure, these at- tacks are becoming a serious concern. For performance rea- sons, several resources as CPU cache memories have to be shared, leaving a door opened for attackers. However, when cryptographic processes are properly characterized it is pos- sible to detect attacks which abuse one shared resource as, for example, CPU cache. In this paper we present a timing char- acterization of a process implementing a cryptographic algo- rithm such as AES. Then we characterize the same encryp- tion process when suffering a cache attack and when shar- ing the CPU with other different processes to evaluate how they affect it and get accurate models. The main idea of this work is getting an accurate timing model to distinguish when a process is or not being attacked regarding to timing mea- surements. Once we get the model, we provide a detection algorithm that detects over 96% of attacks with false posi- tive rates around 5%. The false positive rate is reduced to 0% when discarding the initial transitory state related to the booting stage of a new process.
Nombre congreso
Summer Computer Simulation Conference (SummerSim-SCSC)
Tipo de participación
Lugar del congreso
Montreal, Canadá
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Título de las actas
Proceedings SummerSim-SCSC 2016
Esta actividad pertenece a memorias de investigación
  • Autor: Samira Briongos Herrero (UPM)
  • Autor: Pedro Jose Malagon Marzo (UPM)
  • Autor: José Luis Risco-Martín (Universidad Complutense de Madrid)
  • Autor: Jose Manuel Moya Fernandez (UPM)
Grupos de investigación, Departamentos, Centros e Institutos de I+D+i relacionados
  • Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
  • Centro o Instituto I+D+i: Centro de Investigación en Simulación Computacional
  • Departamento: Ingeniería Electrónica
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