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Descripción
Resistive switching memories [resistive RAM (RRAM)] are an attractive alternative to nonvolatile storage and nonconventional computing systems, but their behavior strongly depends on the cell features, driver circuit, and working conditions. In particular, the circuit temperature and writing voltage schemes become critical issues, determining resistive switching memories performance. These dependencies usually force a design time tradeoff among reliability, device endurance, and power consumption, thereby imposing nonflexible functioning schemes and limiting the system performance. In this paper, we present a writing architecture that ensures the correct operation no matter the working temperature and allows the dynamic load of application-oriented writing profiles. Thus, taking advantage of more efficient configurations, the system can be dynamically adapted to overcome RRAM intrinsic challenges. Several profiles are analyzed regarding power consumption, temperature-variations protection, and operation speed, showing speedups near 700x compared with other published drivers.
Internacional	Si
JCR del ISI	Si
Título de la revista	Ieee Transactions on Very Large Scale Integration (Vlsi) Systems
ISSN	1063-8210
Factor de impacto JCR	1,245
Información de impacto
Volumen	25
DOI	10.1109/TVLSI.2016.2634083
Número de revista	4
Desde la página	1224
Hasta la página	1235
Mes	ABRIL
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Esta actividad pertenece a memorias de investigación

• Autor: Fernando Garcia Redondo (UPM)
• Autor: Pablo Royer Del Barrio (UPM)
• Autor: M. Luisa Lopez Vallejo (UPM)
• Autor: Hernan Aparicio Cerqueira (UPM)
• Autor: Pablo Ituero Herrero (UPM)
• Autor: Carlos Alberto Lopez Barrio (UPM)

• Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
• Departamento: Ingeniería Electrónica