Descripción
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In this paper, the implementation of a Main Profile H.264 decoder based on a DM642 digital signal processor is described. An initial standard compliant raw-C decoder has been optimized in speed for the target processor. The parallelism between algorithm execution and data movement has been fully exploited using DMA. Also, critical parts of the algorithm have been encoded directly in assembly code to increase the number of instructions per cycle. The decoder has been tested in simulation with actual (transcoded) DVD and digital TV streams. According to these tests, standard definition (D1) real time decoding can be obtained with a DM642@720MHz. | |
Internacional
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Si |
Nombre congreso
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14th International Conference on Electronics, Circuits and Systems (ICECS'07) |
Tipo de participación
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960 |
Lugar del congreso
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Marrakech (Marruecos) |
Revisores
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Si |
ISBN o ISSN
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- |
DOI
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Fecha inicio congreso
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11/12/2007 |
Fecha fin congreso
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14/12/2007 |
Desde la página
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Hasta la página
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Título de las actas
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