Observatorio de I+D+i UPM

Descripción
The amazing integration densities achieved by current submicron technologies pay the price of increasing static power dissipation with the corresponding rise in heat density. Dynamic thermal management (DTM) techniques provide thermal-efficient solutions to balance or equally distribute possible on-chip hot spots. Accurate sensing of on-chip temperature is required by optimally allocating smart temperature sensors in the silicon. In this paper, we introduce an ultra low-power (1.05 - 65.5 nW at 5 samples/s) tiny (10250 mum2) CMOS smart temperature sensor based on the thermal dependency of the leakage current. The proposed sensor outperforms all previous works, as far as area and power consumption are concerned (more than 85% reduction in both cases), while still meeting the accuracy constraints imposed by target application domains. Furthermore, a specific interface based on the use of a logarithmic counter has been implemented to digitalize the temperature sensing. These facts, in conjunction with the full compatibility of the sensor with standard CMOS processes, allow the easy integration of many of these tiny sensors in any VLSI layout, making them specially suitable for modern DTM implementations.
Internacional	Si
JCR del ISI	Si
Título de la revista	IEEE SENSORS JOURNAL
ISSN	1530-437X
Factor de impacto JCR	1,34
Información de impacto
Volumen	8
DOI
Número de revista	12
Desde la página	2036
Hasta la página	2043
Mes	ENERO
Ranking

Esta actividad pertenece a memorias de investigación

• Autor: José L. Ayala Rodrigo (UCM)
• Autor: M. Luisa Lopez Vallejo (UPM)
• Autor: Pablo Ituero Herrero (UPM)

• Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
• Departamento: Ingeniería Electrónica