Memorias de investigación
Communications at congresses:
Optimized Architectural Synthesis of Fixed-Point Datapaths
Year:2008
Research Areas
  • Electronics engineering
Information
Abstract
In this paper we address the time-constrained architectural synthesis of fixed-point DSP algorithms using FPGA devices. Optimized fixed-point implementations are obtained by means of considering: (i) a multiple wordlength approach; (ii) a complete datapath formed of wordlength-wise resources (i.e. functional units, multiplexers and registers); and, (iii) a novel resource usage metric that enables the wise distribution of logic fabric and embedded DSP resources. The paper shows: (i) the benefits of applying a multiple wordlength approach to the implementation of fixedpoint datapaths; and (ii) the benefits of a wise use of embedded FPGA resources. The proposed metric enables area improvements up to 54% and the use of a complete fixed-point datapath leads to improvements up to 35%.
International
Si
Congress
International Conference on Reconfigurable Computing and FPGAs, RECONFIG'08
960
Place
Cancún (México)
Reviewers
Si
ISBN/ISSN
Start Date
03/12/2008
End Date
05/12/2008
From page
0
To page
0
Proceedings of the International Conference on Reconfigurable Computing and FPGAs, RECONFIG'08
Participants
Research Group, Departaments and Institutes related
  • Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
  • Departamento: Ingeniería Electrónica