Memorias de investigación
Research Publications in journals:
Architectural Synthesis of Fixed-Point DSP Datapaths
Year:2009

Research Areas
  • Electronics engineering

Information
Abstract
In this paper we address the automatic synthesis of DSP algorithms using FPGAs. Optimized fixed-point implementations are obtained by means of considering: (i) a multiple wordlength approach; (ii) a complete datapath formed of wordlength-wise resources (i.e. functional units, multiplexers and registers); and, (ii) an FPGA-wise resource usage metric that enables an efficient distribution of logic fabric and embedded DSP resources. The paper shows: (i) the benefits of applying a multiple wordlength approach to the implementation of fixed-point datapath; and (ii) the benefits of a wise use of embedded FPGA resources. The use of a complete fixed-point datapath leads to improvements up to 35%. And, the wise mapping of opertaions to FPGA resources (logic fabric and embedded blocks), thanks to the proposed resource usage metric, leads to improvements up to 54%.
International
Si
JCR
No
Title
International Journal of Reconfigurable Computing
ISBN
1687-7195
Impact factor JCR
0
Impact info
Volume
2009
10.1155/2009/703267
Journal number
0
From page
1
To page
14
Month
AGOSTO
Ranking
Participants

Research Group, Departaments and Institutes related
  • Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
  • Departamento: Ingeniería Electrónica