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Abstract
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| In this paper we address the automatic synthesis of DSP algorithms using FPGAs. Optimized fixed-point implementations are obtained by means of considering: (i) a multiple wordlength approach; (ii) a complete datapath formed of wordlength-wise resources (i.e. functional units, multiplexers and registers); and, (ii) an FPGA-wise resource usage metric that enables an efficient distribution of logic fabric and embedded DSP resources. The paper shows: (i) the benefits of applying a multiple wordlength approach to the implementation of fixed-point datapath; and (ii) the benefits of a wise use of embedded FPGA resources. The use of a complete fixed-point datapath leads to improvements up to 35%. And, the wise mapping of opertaions to FPGA resources (logic fabric and embedded blocks), thanks to the proposed resource usage metric, leads to improvements up to 54%. | |
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International
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Si |
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JCR
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No |
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Title
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International Journal of Reconfigurable Computing |
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ISBN
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1687-7195 |
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Impact factor JCR
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0 |
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Impact info
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Volume
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2009 |
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10.1155/2009/703267 |
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Journal number
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0 |
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From page
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1 |
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To page
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14 |
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Month
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AGOSTO |
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Ranking
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