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Descripción
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| Nowadays the integration degree achieved by deep sub-micron technologies allows the implementation of complex applications in current FPGAs. This is the case of computations that use floating-point arithmetic, which require large amounts of resources and long design times. Thus, the availability of libraries of floating-point operators can significantly help designers when dealing with this kind of applications. Furthermore, the encapsulation of the components of this library becomes a must to ease the automation of the design cycle, which is currently under research. In this work we present a standard floating-point library fully compliant with the IEEE standard. The multiple design choices of the designed operators have been collected and encapsulated through the definition of a high level interface using the xHDL language. This encapsulation considerably simplifies the handling of the floating-point operators carried out by system tools. | |
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Internacional
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Si |
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Nombre congreso
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Design of Circuits and Integrated Systems Conference |
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Tipo de participación
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960 |
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Lugar del congreso
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Zaragoza |
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Revisores
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Si |
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ISBN o ISSN
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0-8194-5832-5 |
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DOI
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Fecha inicio congreso
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18/11/2009 |
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Fecha fin congreso
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20/11/2009 |
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Desde la página
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0 |
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Hasta la página
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0 |
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Título de las actas
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XXIV Conference on Design of Circuits and Integrated Systems |