Observatorio de I+D+i UPM

Memorias de investigación
Ponencias en congresos:
Development of a standard single floating-point library and its encapsulation for reuse
Año:2009
Áreas de investigación
  • Industria electrónica
Datos
Descripción
Nowadays the integration degree achieved by deep sub-micron technologies allows the implementation of complex applications in current FPGAs. This is the case of computations that use floating-point arithmetic, which require large amounts of resources and long design times. Thus, the availability of libraries of floating-point operators can significantly help designers when dealing with this kind of applications. Furthermore, the encapsulation of the components of this library becomes a must to ease the automation of the design cycle, which is currently under research. In this work we present a standard floating-point library fully compliant with the IEEE standard. The multiple design choices of the designed operators have been collected and encapsulated through the definition of a high level interface using the xHDL language. This encapsulation considerably simplifies the handling of the floating-point operators carried out by system tools.
Internacional
Si
Nombre congreso
Design of Circuits and Integrated Systems Conference
Tipo de participación
960
Lugar del congreso
Zaragoza
Revisores
Si
ISBN o ISSN
0-8194-5832-5
DOI
Fecha inicio congreso
18/11/2009
Fecha fin congreso
20/11/2009
Desde la página
0
Hasta la página
0
Título de las actas
XXIV Conference on Design of Circuits and Integrated Systems
Esta actividad pertenece a memorias de investigación
Participantes
  • Autor: Pedro Echevarria Aramendi (UPM)
  • Autor: Miguel Ángel Sánchez Marcos (UPM)
  • Autor: M. Luisa Lopez Vallejo (UPM)
  • Autor: Carlos Alberto Lopez Barrio (UPM)
Grupos de investigación, Departamentos, Centros e Institutos de I+D+i relacionados
  • Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
  • Departamento: Ingeniería Electrónica
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