Observatorio de I+D+i UPM

Descripción
This work elaborates the implementation and the use of dedicated hardware in computer network security. The novel FPGA implementation for user profiling in intrusion detection systems, provides new potential which can further lead to better performances and more reliable security systems. The results yield a promising future for these systems and overcome many speed drawbacks and disadvantages of already existing algorithms as well as platform for development the new, original ones.
Internacional	Si
JCR del ISI	No
Título de la revista	Information Assurance and Security Letters, MIR Labs Pub.
ISSN	2150-7996
Factor de impacto JCR	0
Información de impacto
Volumen	1
DOI
Número de revista
Desde la página	12
Hasta la página	17
Mes	ENERO
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Esta actividad pertenece a memorias de investigación

• Autor: Slobodan Bojanic Antonijevic (UPM)
• Participante: Vukasin Pejovic
• Autor: Gabriel Caffarena Fernandez (UPM)
• Participante: Vladimir Milovanovic
• Autor: Carlos Carreras Vaquer (UPM)
• Participante: Jelena Popovic

• Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
• Departamento: Ingeniería Electrónica