Observatorio de I+D+i UPM

Descripción
Current GPU architectures provide impressive processing rates in graphical applications because of their specialized graphics pipeline. However, little attention has been paid to the analysis and study of different hardware architectures to implement specific pipeline stages. In this work we have identified one of the key stages in the graphics pipeline, the triangle traversal procedure, and we have imple- mented three different algorithms in hardware: bounding-box, zig-zag and Hilbert curve-based. The experimental results show that important area-performance trade-offs can be met when implementing key image processing algorithms in hardware.
Internacional	Si
Nombre congreso	25th Conference on Design of Circuits and Integrated Systems (DCIS'10)
Tipo de participación	960
Lugar del congreso	Lanzarote, Spain
Revisores	Si
ISBN o ISSN	9788469373934
DOI
Fecha inicio congreso	17/11/2010
Fecha fin congreso	19/11/2010
Desde la página	54
Hasta la página	59
Título de las actas	25th Conference on Design of Circuits and Integrated Systems Proceedings

Esta actividad pertenece a memorias de investigación

• Autor: Pablo Ituero Herrero (UPM)
• Autor: M. Luisa Lopez Vallejo (UPM)
• Autor: Carlos Alberto Lopez Barrio (UPM)

• Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
• Departamento: Ingeniería Electrónica