Observatorio de I+D+i UPM

Descripción
Linear regression is a technique widely used in digital signal processing. It consists on finding the linear function that better fits a given set of samples. This paper proposes different hardware architectures for the implementation of the linear regression method on FPGAs, specially targeting area restrictive systems. It saves area at the cost of constraining the lengths of the input signal to some fixed values. We have implemented the proposed scheme in an Automatic Modulation Classifier, meeting the hard real-time constraints this kind of systems have.
Internacional	Si
Nombre congreso	Design of Circuits and Integrated Systems
Tipo de participación	960
Lugar del congreso	Albufeira, Portugal
Revisores	Si
ISBN o ISSN	978-972-99181-3-1
DOI
Fecha inicio congreso	16/11/2011
Fecha fin congreso	18/11/2011
Desde la página	333
Hasta la página	338
Título de las actas	Design of Circuits and Integrated Systems

Esta actividad pertenece a memorias de investigación

• Autor: Pablo Royer Del Barrio (UPM)
• Autor: Miguel Ángel Sánchez Marcos (UPM)
• Autor: M. Luisa Lopez Vallejo (UPM)
• Autor: Carlos Alberto Lopez Barrio (UPM)

• Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
• Departamento: Ingeniería Electrónica