Memorias de investigación
Communications at congresses:
Area-Efficient Linear Regression Architecture for Real-Time Signal Processing on FPGAs
Year:2011

Research Areas
  • Electronics engineering

Information
Abstract
Linear regression is a technique widely used in digital signal processing. It consists on finding the linear function that better fits a given set of samples. This paper proposes different hardware architectures for the implementation of the linear regression method on FPGAs, specially targeting area restrictive systems. It saves area at the cost of constraining the lengths of the input signal to some fixed values. We have implemented the proposed scheme in an Automatic Modulation Classifier, meeting the hard real-time constraints this kind of systems have.
International
Si
Congress
Design of Circuits and Integrated Systems
960
Place
Albufeira, Portugal
Reviewers
Si
ISBN/ISSN
978-972-99181-3-1
Start Date
16/11/2011
End Date
18/11/2011
From page
333
To page
338
Design of Circuits and Integrated Systems
Participants

Research Group, Departaments and Institutes related
  • Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
  • Departamento: Ingeniería Electrónica