Descripción
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Linear regression is a technique widely used in digital signal processing. It consists on finding the linear function that better fits a given set of samples. This paper proposes different hardware architectures for the implementation of the linear regression method on FPGAs, specially targeting area restrictive systems. It saves area at the cost of constraining the lengths of the input signal to some fixed values. We have implemented the proposed scheme in an Automatic Modulation Classifier, meeting the hard real-time constraints this kind of systems have. | |
Internacional
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Si |
Nombre congreso
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Design of Circuits and Integrated Systems |
Tipo de participación
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960 |
Lugar del congreso
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Albufeira, Portugal |
Revisores
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Si |
ISBN o ISSN
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978-972-99181-3-1 |
DOI
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Fecha inicio congreso
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16/11/2011 |
Fecha fin congreso
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18/11/2011 |
Desde la página
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333 |
Hasta la página
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338 |
Título de las actas
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Design of Circuits and Integrated Systems |