Observatorio de I+D+i UPM
• ESPAÑOL
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INVESTIGADORES
ESTRUCTURAS DE I+D+I
ACTIVIDAD INVESTIGADORA
INNOVACIÓN
Investigador
Jose Andres Otero Marnotes
Categoría Investigador
L.D. PRF.CONTR.DOCT.
Cargos actuales
SECRETARIO DE DEPARTAMENTO.
Escuela UPM
E.T.S. DE INGENIEROS INDUSTRIALES
Departamento:
AUTOMÁTICA, INGENIERÍA ELÉCTRICA Y ELECTRÓNICA E INFORMÁTICA INDUSTRIAL
Centros/Institutos I+D+i
CENTRO DE ELECTRONICA INDUSTRIAL "CEI"
Area Conocimiento
TECNOLOGIA ELECTRONICA
Grupo de Investigación:
Grupo en Tecnología Electrónica Aplicada (GTEA)
Email (Directorio UPM)
joseandres.otero
upm.es
Teléfono (Directorio UPM)
910676949
Datos de Memorias relacionados
Proyectos de I+D+i y generación de recursos
14 Proyectos de I+D+i
1: (2010)
RECONFIGURABILIDAD DINAMICA PARA ESCALABILIDAD EN REDES ORIENTADAS A APLICACIONES MULTIMEDIA
2: (2011)
DYNAMICALLY RECONFIGURABLE EMBEDDED PLATFORM FOR NETWARKED CONTEXT-AWARE MULTIMEDIA SYSTEMS-UPM
3: (2011)
FASTCUDA: Open Source FPGA Accelerator & Hardware-Software Codesign Toolset for CUDA Kernels
4: (2011)
RECONFIGURABILIDAD DINAMICA PARA ESCALABILIDAD EN REDES ORIENTADAS A APLICACIONES MULTIMEDIA
5: (2011)
RECONFIGURABILIDAD INTEROPERABLE
6: (2011)
RECONFIGURABLE ULTRA-AUTONOMOUS NOVEL ROBOTS RUNNER
7: (2012)
DYNAMICALLY RECONFIGURABLE EMBEDDED PLATFORM FOR NETWARKED CONTEXT-AWARE MULTIMEDIA SYSTEMS-UPM
8: (2014)
FastCUDA
9: (2015)
DREAMS-UPM: Dynamically Reconfigurable embedded platforms for Networked Context-aware multimedia Systems-UPM
10: (2016)
ENABLE-S3: European Initiative to Enable Validation for Highly Automated Safe and Secure Systems
11: (2017)
CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of Reconfigurable systems in unceRtain hybRid envirOnments
12: (2018)
GORDON 2.0: DESARROLLO HERRAMIENTA SOFTWARE DE RESPUESTA EN TIEMPO REAL PARA OPTIMIZAR UNA FLOTA DE RECOGIDA SOSTENIBLE (GORDON 2.0)
13: (2018)
PLATINO: Plataforma HW/SW distribuida para el procesamiento inteligente de información sensorial heterogénea en aplicaciones de supervisión de grandes espacios naturales
14: (2019)
INSIGHT: DESARROLLO DE UN SISTEMA DE CLASIFICACIÓN Y SELECCIÓN, EN TIEMPO REAL, DE MATERIALES DENTRO DEL FLUJO DE TRATAMIENTO DE LOS RESIDUOS SÓLIDOS URBANOS
Formación de Investigadores y Movilidad
1 Estancias y sabáticos recogidos en programas oficiales
1: (2011)
Estancia para la realización de tesis
2 Tesis Doctorales
1: (2013)
Noise-agnostic self-adaptive evolvable hardware for real time video filtering applications
2: (2014)
Run-Time Scalable Hardware for Reconfigurable Systems
Difusión de Resultados de Investigación
22 Artículos en revistas
1: (2010)
Adaptable Security in Wireless Sensor Networks by Using Reconfigurable ECC Hardware Coprocessors
2: (2010)
Adaptable Security in Wireless Sensor Networks by Using Reconfigurable ECC Hardware Coprocessors
3: (2012)
Automatic Generation of Identical Routing Pairs for FPGA Implemented DPL Logic
4: (2012)
Dreams: A Tool for the design of Dynamically Reconfigurable Embedded and Modular Systems
5: (2012)
Using SRAM Based FPGAs for Power-Aware High Performance Wireless Sensor Networks
6: (2013)
A scalable H.264/AVC Deblocking Filter Architecture
7: (2013)
A scalable H.264/AVC Deblocking Filter Architecture
8: (2013)
Architectural Evaluation of Dynamic and Partial Reconfigurable Systems designed with DREAMS Tool
9: (2013)
Self-Reconfigurable Evolvable Hardware System for Adaptive Image Processing
10: (2013)
Sophisticated Security Verification on Routing Repaired Balanced Cell-Based Dual-Rail Logic against Side Channel Analysis
11: (2013)
Sophisticated Security Verification on Routing Repaired Balanced Cell-Based Dual-Rail Logic against Side Channel Analysis
12: (2014)
Customized and automated routing repair toolset towards side-channel analysis resistant dual rail logic
13: (2015)
Sophisticated security verification on routing repaired balanced cell-based dual-rail logic against side channel analysis
14: (2016)
A scalable H.264/AVC deblocking filter architecture
15: (2017)
Dynamic Reconfiguration under RTEMS for Fault Mitigation and Functional Adaptation in SRAM-based SoPCs for Space Systems
16: (2018)
A Runtime-Scalable and Hardware-Accelerated Approach to On-Board Linear Unmixing of Hyperspectral Images
17: (2018)
FPGA-Based High-Performance Embedded Systems for Adaptive Edge Computing in Cyber-Physical Systems: The ARTICo(3) Framework
18: (2018)
IMPRESS: Automated Tool for the Implementation of Highly Flexible Partial Reconfigurable Systems with Xilinx Vivado
19: (2018)
Performance Analysis of SEE Mitigation Techniques on Zynq Ultrascale plus Hardened Processing Fabrics
20: (2019)
Artificial Vision on Edge IoT Devices: A Practical Case for 3D Data Classification
21: (2019)
Automated Tool and Runtime Support for Fine-Grain Reconfiguration in Highly Flexible Reconfigurable Systems
22: (2019)
Data Transfer Modeling and Optimization in Reconfigurable Multi-Accelerator Systems
2 Capítulos de libros
1: (2012)
Run-time Scalable Architecture for Deblocking Filtering in H.264/AVC and SVC Video Codecs
2: (2014)
13.13 Wireless Sensor Networks: From Real World to System Integration ? Alternative Hardware Approaches
35 Ponencia en Congresos
1: (2010)
A Modular Peripheral to Support Self¿Reconfiguration in SoCs
2: (2010)
Feasibility of HW genetic algorithms for profile selection in reconfigurable autonomous embedded systems
3: (2010)
Generic Systolic Array for Run-time Scalable Cores
4: (2010)
Run-time Scalable Systolic Coprocessors for Flexible Multimedia SoPCs
5: (2011)
A Fast Reconfigurable 2D HW Core Architecture on FPGAs for Evolvable Self- Adaptive Systems
6: (2011)
A Novel Scalable Deblocking-Filter Architecture for H.264/AVC and SVC Video Codecs
7: (2011)
Cost and energy efficient reconfigurable embedded platform using Spartan-6 FPGAs
8: (2011)
Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support
9: (2011)
Fault Tolerance Analysis and Self-Healing Strategy of Autonomous, Evolvable Hardware Systems
10: (2011)
Framework adaptable y reconfigurable dinámicamente para procesamiento de vídeo: aplicación a la etapa de filtrado adaptativo en sistemas de compresión de vídeo H.264/AVC y SVC
11: (2011)
Run-time Scalable Architecture for Deblocking Filtering in H.264/AVC-SVC Video Codecs
12: (2011)
"Scalable 2D architecture for H.264 SVC deblocking filter with reconfiguration capabilities for on-demand adaptation"
13: (2011)
2D Reconfigurable Systolic Core Architecture for Evolvable Systems
14: (2012)
Automatic Generation of Identical Routing Pairs for FPGA Implemented DPL Logic
15: (2012)
Dreams: A Tool for the design of Dynamically Reconfigurable Embedded and Modular Systems
16: (2012)
Implementation techniques for evolvable HW systems: virtual vs. dynamic reconfiguration
17: (2012)
Implementation techniques for evolvable HW systems: virtual vs. dynamic reconfiguration
18: (2012)
On The Automatic Integration of Hardware Accelerators into FPGA-based Embedded Systems
19: (2013)
A Noise-Agnostic Self-Adaptive Image Processing Applications Based on Evolvable Hardware
20: (2013)
A Noise-Agnostic Self-Adaptive Image Processing Applications Based on Evolvable Hardware
21: (2013)
A Novel FPGA-based Evolvable Hardware System based on Multiple Processing Arrays
22: (2013)
A Novel FPGA-based Evolvable Hardware System based on Multiple Processing Arrays
23: (2013)
A Scalable Evolvable Hardware Processing Array
24: (2013)
A self-adaptive image processing application based on evolvable and scalable hardware
25: (2013)
Architectural Evaluation of Dynamic and Partial Reconfigurable Systems designed with DREAMS Tool
26: (2013)
Architectural Evaluation of Dynamic and Partial Reconfigurable Systems designed with DREAMS Tool
27: (2013)
Noise-agnostic Adaptive Image Filtering without Training References on an Evolvable Hardware Platform
28: (2014)
Increased fault tolerance in evolvable hardware through automatic upscaling
29: (2018)
IMPRESS: Automated Tool for the Implementation of Highly Flexible Partial Reconfigurable Systems with Xilinx Vivado
30: (2018)
'Performance Analysis of SEE Mitigation Techniques on Zynq Ultrascale+ Hardened Processing Fabrics'
31: (2019)
A Fast Prototyping Workflow for Reconfigurable SDR Applications
32: (2019)
Artificial Vision on Edge IoT Devices: A Practical Case for 3D Data Classification
33: (2019)
Automated Tool and Runtime Support for Fine-Grain Reconfiguration in Highly Flexible Reconfigurable Systems
34: (2019)
Automated Tool and Runtime Support for Fine-Grain Reconfiguration in Highly Flexible Reconfigurable Systems
35: (2019)
Data Transfer Modeling and Optimization in Reconfigurable Multi-Accelerator Systems
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