Observatorio de I+D+i UPM
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INVESTIGADORES
ESTRUCTURAS DE I+D+I
ACTIVIDAD INVESTIGADORA
INNOVACIÓN
Investigador
Jorge Cortés González
Categoría Investigador
BECARIO OTT
Escuela UPM
CENTRO DE ELECTRONICA INDUSTRIAL "CEI"
Departamento:
AUTOMÁTICA, INGENIERÍA ELÉCTRICA Y ELECTRÓNICA E INFORMÁTICA INDUSTRIAL
Area Conocimiento
TECNOLOGIA ELECTRONICA
Grupo de Investigación:
Sin grupo de investigación
Email (Directorio UPM)
jorge.cgonzalez
alumnos.upm.es
Investigador no vigente en la UPM
Datos de Memorias relacionados
Proyectos de I+D+i y generación de recursos
2 Proyectos de I+D+i
1: (2012)
PowerSwipe: POWER SoC With Integrated PassivEs
2: (2015)
: Fuentes de alimentación para los imanes superconductores del XFEL europeo
Formación de Investigadores y Movilidad
2 Tesis Doctorales
1: (2013)
Modelling, analysis and optimization of analog controls for a Buck converter
2: (2015)
A methodology to analyze, design and implement very fast and robust controls of Buck-type converters
Difusión de Resultados de Investigación
9 Artículos en revistas
1: (2014)
Accurate analysis of sub-harmonic oscillations of V2 and V2Ic controls applied to Buck converter
2: (2014)
Accurate analysis of sub-harmonic oscillations of V2 and V2Ic controls applied to Buck converter
3: (2014)
An optimization algorithm to design fast and robust analog controls for Buck converters
4: (2014)
Analysis of the effect of modulation delays on the size of the output capacitor
5: (2014)
DC / DC converters as DC circuit-breakers in HVDC networks operation.
6: (2014)
Energy-Based switches losses model for the optimization of PwrSoC buck converter
7: (2015)
Improved transient response of controllers by synchronizing the modulator with the load step: application to v2ic
8: (2015)
upsilon(1) Concept: Designing a Voltage-Mode Control as Current Mode With Near Time-Optimal Response for Buck-Type Converters
9: (2015)
v1 concept: designing a voltage mode control as current mode with near time-optimal response for Buck-type converters
11 Ponencia en Congresos
1: (2014)
An optimization algorithm to design fast and robust analog controls for Buck converters
2: (2014)
Analysis of the effect of modulation delays on the size of the output capacitor
3: (2014)
Comparison of the behavior of voltage mode, V2 and V2Ic control of a buck converter for a very fast and robust dynamic response
4: (2014)
DC / DC converters as DC circuit-breakers in HVDC networks operation
5: (2014)
Energy-Based switches losses model for the optimization of PwrSoC buck converter
6: (2014)
Impact of the control on the size of the output capacitor in the integration of Buck converters
7: (2014)
Impact of the control on the size of the output capacitor in the integration of Buck converters
8: (2014)
Optimization and analysis of PwrSoC Buck converter with integrated passives for automotive application
9: (2015)
Design-oriented stability criteria of a v2 control compensated with inductor current of a boost converter for shipboard power systems with Near Time-Optimal Response
10: (2015)
Multiphase Current Controlled Buck Converter with Energy Recycling Output Impedance Correction Circuit (OICC): Adaptive Voltage Positioning (AVP) and Dynamic Voltage Scaling (DVS) Application
11: (2015)
Overview, Equivalences and Design Guidelines of $v^1$ Concept: a Voltage Mode Control That Behaves as a Current-Mode with Near Time-Optimal Response
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S2i 2023 Observatorio de investigación @ UPM con la colaboración del Consejo Social UPM
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