Descripción
|
|
---|---|
The dHDL language has been defined to improve hardware design productivity. This is achieved through the definition of a better reuse interface (including parameters, attributes / macroports) and the creation of control structures that help the designer. | |
Internacional
|
Si |
Nombre congreso
|
IEEE 10th International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2012 |
Tipo de participación
|
960 |
Lugar del congreso
|
Leganés, Spain |
Revisores
|
Si |
ISBN o ISSN
|
978-1-4673-1631-6 |
DOI
|
|
Fecha inicio congreso
|
10/07/2012 |
Fecha fin congreso
|
13/07/2012 |
Desde la página
|
857 |
Hasta la página
|
858 |
Título de las actas
|
Proceedings IEEE 10th International Symposium on Parallel and Distributed Processing with Applications (ISPA), 2012 |