Memorias de investigación
Ponencias en congresos:
A Fast Interpolative Wordlength Optimization Method for DSP Systems
Año:2012

Áreas de investigación
  • Procesado y análisis de la señal

Datos
Descripción
As Digital Signal Processing (DSP) systems grow in complexity, the classical simulation-based approaches to the wordlength optimization (WLO) problem for fixed-point data representation can no longer be used due to unaffordable execution times. Thus, it is necessary to accelerate the computations and significantly reduce the number of simulations performed in order to obtain optimized solutions in reasonable times. In this paper a new interpolative method is presented. This technique makes use of the information obtained in previous steps of the WLO process to guide the search so the number of required simulations is minimized. Experimental results show that this process provides optimized results several times faster than the traditional approaches without any significant penalty on the quality of the solutions.
Internacional
Si
Nombre congreso
IEEE VIII Southern Programming Logic Conference, SPL'12
Tipo de participación
960
Lugar del congreso
Bento Gonçalves (Brasil)
Revisores
Si
ISBN o ISSN
978-1-4673-0184-8
DOI
Fecha inicio congreso
20/03/2012
Fecha fin congreso
23/03/2012
Desde la página
1
Hasta la página
6
Título de las actas
Proceedings of the IEEE VIII Southern Programming Logic Conference

Esta actividad pertenece a memorias de investigación

Participantes

Grupos de investigación, Departamentos, Centros e Institutos de I+D+i relacionados
  • Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
  • Departamento: Ingeniería Electrónica