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Descripción
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| During the last decades, new video compression standards arose every few years with always higher compression gains and considerable increases on the computational cost. Single core processors have reached their limit and multicore processors are there to overcome this issue to give more processing power. In order to accelerate the implementation of new video coding standards, MPEG has standardized an alternative framework to describe video decoders. It is based on reference decoders written in the RVC CAL dataflow actor language. From these descriptions, a compiler ?? Open RVC CAL compiler (Orcc) ?? allows the automatic generation of C code dedicated to the target processor. In this paper, a DSP based decoder compliant with the new High Efficiency Video Coding (HEVC) standard has been implemented using a CAL RVC model as a starting point. This is the first implementation of an HEVC decoder with DSP technology based on a HEVC RVC CAL model. The decoder has been compared in performance with a GPP implementation, also based on the RVC CAL model, and outperforms it by more than 50%. Additionally, the performance of this decoder is compared with that of other DSP-based HEVC decoders implemented without using the Orcc infrastructure. | |
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Internacional
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Si |
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JCR del ISI
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Si |
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Título de la revista
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Ieee Transactions on Consumer Electronics |
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ISSN
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0098-3063 |
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Factor de impacto JCR
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0,941 |
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Información de impacto
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Datos JCR del año 2011 |
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Volumen
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59 |
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DOI
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Número de revista
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Desde la página
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839 |
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Hasta la página
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847 |
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Mes
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NOVIEMBRE |
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Ranking
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