Communications at congresses:
Execution modeling in self-aware FPGA-based architectures for efficient resource management
Execution modeling in self-aware FPGA-based architectures for efficient resource management
Year:2015
Research Areas
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Electric engineers, electronic and automatic (eil)
Information
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Abstract
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| Execution modeling in self-aware FPGA-based architectures for efficient resource management | |
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International
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Si |
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Congress
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International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) |
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960 |
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Place
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Bremen (Germany) |
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Reviewers
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Si |
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ISBN/ISSN
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978-1-4673-7942-7 |
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Start Date
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29/06/2015 |
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End Date
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01/07/2015 |
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From page
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1 |
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To page
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8 |
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Proceedings of International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) |
Open Access publication
Participants
- Autor: Alfonso Rodriguez Medina (UPM)
- Autor: Juan Valverde Alcalá (UPM)
- Autor: Cesar Castañares (UPM)
- Autor: Jorge Portilla Berrueco (UPM)
- Autor: Eduardo de la Torre Arnanz (UPM)
- Autor: Teresa Riesgo Alcaide (UPM)
Research Group, Departaments and Institutes related
- Creador: Grupo de Investigación: Electrónica Industrial
- Centro o Instituto I+D+i: Centro de Electrónica Industrial. CEI
- Departamento: Automática, Ingeniería Eléctrica y Electrónica e Informática Industrial
S2i 2019 Observatorio de investigación @ UPM con la colaboración del Consejo Social UPM
Cofinanciación del MINECO en el marco del Programa INNPACTO (IPT-020000-2010-22)