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Memorias de investigación
Research Publications in journals:
A hardware mechanism to reduce the energy consumption of the register file of in-order architectures
Year:2008
Research Areas
  • Electronics engineering
Information
Abstract
This paper introduces an efficient hardware approach to reduce the register file energy consumption by turning unused registers into a low power state. Bypassing the register fields of the fetch instruction to the decode stage allows the identification of registers required by the current instruction (instruction predecode) and allows the control logic to turn them back on. They are put into the low-power state after the instruction use. This technique achieves an 85% energy reduction with no performance penalty.
International
Si
JCR
No
Title
ISBN
Impact factor JCR
0
Impact info
Volume
3
10.1504/IJES.2008.022400
Journal number
4
From page
285
To page
293
Month
ENERO
Ranking
Participants
  • Autor: José L. Ayala Rodrigo (UCM)
  • Autor: Carlos Alberto Lopez Barrio (UPM)
  • Autor: Alexander Veidenbaum (Center for Embedded Computer Systems, University of California in Irvine, USA )
  • Autor: M. Luisa Lopez Vallejo (UPM)
Research Group, Departaments and Institutes related
  • Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
  • Departamento: Ingeniería Electrónica
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