Descripción
|
|
---|---|
The first level data cache in modern processors has become a major consumer of energy due to its increasing size and high frequency access rate. In order to reduce this high energy con sumption, we propose in this paper a straightforward filtering technique based on a highly accurate forwarding predictor. Specifically, a simple structure predicts whether a load instruction will obtain its corresponding data via forwarding from the load-store structure -thus avoiding the data cache access - or if it will be provided by the data cache. This mechanism manages to reduce the data cache energy consumption by an average of 21.5% with a negligible performance penalty of less than 0.1%. Furthermore, in this paper we focus on the cache static energy consumption too by disabling a portion of sets of the L2 associative cache. Overall, when merging both proposals, the combined L1 and L2 total energy consumption is reduced by an average of 29.2% with a performance penalty of just 0.25%. Keywords: Energy consumption; filtering; forwarding predictor; cache hierarchy | |
Internacional
|
Si |
JCR del ISI
|
Si |
Título de la revista
|
Journal of Circuits Systems And Computers |
ISSN
|
0218-1266 |
Factor de impacto JCR
|
0,281 |
Información de impacto
|
|
Volumen
|
21 |
DOI
|
10.1142/50218126612500570 |
Número de revista
|
7 |
Desde la página
|
124 |
Hasta la página
|
146 |
Mes
|
NOVIEMBRE |
Ranking
|