Memorias de investigación
Tesis:
Compiler and Runtime Support for the Execution of Scientific Codes on Heterogeneous Parallel Architectures
Año:2017

Áreas de investigación
  • Ciencias de la computación y tecnología informática,
  • Diseño de sistemas electrónicos con microcontroladores,
  • Diseño de sistemas electrónicos con sistemas microprocesadores,
  • Diseño de circuitos integrados de circuitería reconfigurable

Datos
Descripción
This thesis approaches the problem of optimizing the execution of scientific codes, in particular Computational Fluid Dynamics codes, with the help of Heterogeneous HPC systems. These systems differ from standard, homogeneous HPC systems in that the architectures of the processing elements used as building blocks differ from each other. A special interest of this work is to analyze the feasibility of using Field-Programmable Gate Arrays (FPGAs) in these systems as accelerators to scientific simulations. Because these devices are essentially reconfigurable hardware, they allow a finer-grain parallelism than general-purpose processors, which translates into a higher throughput when computational kernels are ported to them. Additionally, FPGAs achieve levels of power efficiency that are currently unparalleled by any existing mainstream computing device. Unfortunately, the novelty of this approach implies that the programming effort required to implement such solutions is still high compared to other well-known accelerating technologies such as General-Purpose Graphics Processing Units (GPGPUs). The algorithms, methodologies and software libraries introduced throughout this Thesis improve data transfer of the aforementioned codes in FPGA-based parallel heterogeneous systems, while also reducing the development effort required to implement these. Specifically, we propose a methodology to reduce the size of the datasets and transfer them efficiently to the FPGA, as well as two compiler and runtime techniques to automate the parallelization of the codes suitable for heterogeneous systems, one focused on control flow distribution and another one based on pipelining of loop sequences. The latter are techniques at the system level, therefore they are independent from the architectures used in the heterogeneous system.
Internacional
Si
ISBN
Tipo de Tesis
Doctoral
Calificación
Sobresaliente cum laude
Fecha
29/09/2017

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Participantes

Grupos de investigación, Departamentos, Centros e Institutos de I+D+i relacionados
  • Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
  • Departamento: Ingeniería Electrónica
  • Centro o Instituto I+D+i: Centro de I+d+i en Procesado de la Información y Telecomunicaciones