Memorias de investigación
Communications at congresses:
Exploring Performance-Power Trade-offs for Look-Up Tables in SRAM-based FPGAs
Year:2009

Research Areas
  • Electronics engineering

Information
Abstract
Current trend on FPGAs is to increase the number of inputs of the LUT up to six inputs to improve resource utilization. In this work we have analyzed the impact of the inputs expansion in two different architectures, memory-based and multiplexer-based, considering area, performance and power. A new memory-based architecture is presented based on the use of a 7-transistor cell and dedicated reading and writing circuits. The experimental results carried out demonstrate that for a six input LUT, our architecture outperforms the traditional multiplexer-based LUT, which is commonly considered the optimum architecture.
International
Si
Congress
IEEE International Conference on Electronics, Circuits and Systems, ICECS
960
Place
Tunisia
Reviewers
Si
ISBN/ISSN
978-1-4244-5091-6
Start Date
13/12/2009
End Date
16/12/2009
From page
423
To page
426
2009 16th IEEE International Conference On Electronics, Circuits and Systems
Participants

Research Group, Departaments and Institutes related
  • Creador: Grupo de Investigación: Laboratorio de Sistemas Integrados (LSI)
  • Departamento: Ingeniería Electrónica